View WEO012864BLPP3N00000_7778253.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 ? 21 oled specification model no: WEO012864BLPP3N00000 free datasheet http://www..net/
2 ? 21 free datasheet http://www..net/
3 ? 21 specification ver:0 customer : module no. : WEO012864BLPP3N00000 approved by: ( for customer use only ) pcb version: data: sales by approved by checked by prepared by issued date: free datasheet http://www..net/
4 ? 21 modle no records of revision doc. first issue version date revised page no. summary 0 2012/09/17 first issue free datasheet http://www..net/
5 ? 21 1. module classification information w e o 012864 b l p p 3 n 00000 1 2 3 4 5 6 7 8 ?? ? 1 brand winstar display corporation 2 e oled 3 display type h character type, g graphic type, o cog type 4 number of dots 128*64 dots 5 serials code a amber r red b blue c full color g green w white 6 emitting color y yellow green l yellow 7 polarizer p with polarizer; n: without polarizer 8 display mode p passive matrix ; a: active matrix 9 driver voltage 3: 3.0 v; 5: 5.0v 10 touch panel n without touch panel; t: with touch panel 11 products type 0 standard type 1. sunlight readable type 2. transparent oled (toled) 3. flexible oled 4. oled for lighting 12 product grades product grades : 0 standard(a-level) 2 b-level 3 c-level 4 high class(aa-level) 5 customer offerings 13 serial no. application serial number (00~zz) free datasheet http://www..net/
6 ? 21 2. general description item dimension unit number of characters 128 x 64 dots module dimension 45.24 29.14 2.05 (mm) mm active area 35.056 17.52 (mm) mm pixel pitch 0.274 0.274 (mm) mm pixel size 0.258 0.258 (mm) mm display mode passive matrix display color yellow drive duty 1/64 duty 3. absolute maximum ratings parameter symbol min max unit notes supply voltage for logic vdd -0.3 4 v 1,2 supply voltage for display vcc 0 15 v 1,2 operating temperature top -40 80 c storage temperature tstg -40 80 c note 1: all the above voltages are on the basis of vss = 0v. note 2: when this module is used beyond the above a bsolute maximum ratings, permanent breakage of the module may occur. also, for normal operations, it is desirable to use this module under the conditions according to secti on 3.optics & electrical characteristics. if this module is used beyond the se conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate. free datasheet http://www..net/
7 ? 21 4. block diagram mcu interface selection: bs1 and bs2 pins connected to mcu interface: cs#, res#, d/c#, r /w#, e/rd#, and d0~d7 c1, c3: 0.1 f c2: 4.7 f c4: 10 f c5: 4.7 f / 25v tantalum capacitor r1: 910k , r1 = (voltage at iref - vss) / iref free datasheet http://www..net/
8 ? 21 5. contour drawing the non-specified tolerance of dimension is 0.2mm. 45.240.2 37.056(va) 35.056(aa) 29.140.2 24.50 19.52(va) 17.52(aa) pull tape 4.09 5.09 3.21 stiffener contact side 12.5 p0.5*23=11.50.05 0.35 3.000.3 4.500.5 36.001.0 16.37 1 24 128*64 dots 0.258 0.274 0.258 0.274 scale:20/1 dots size vlss vss nc vdd 23 5 6 4 cs# 8 7 bs1 1 nc(gnd) res# d/c# 10 9 r/w# e/rd# 12 11 d0 13 14 d2 d3 16 15 d1 d4 d5 18 17 d6 d7 20 19 0.300.05 iref vcomh 22 21 vcc gnd 24 23 bs2 2.05 remove tape 2.21 44.24 polarizer 0.5 23.00 polarizer 0.5 6.000.3 25.000.3 10.40.1 8.500.1 3m#1318b 15*8*0.063mm r 0 . 4 0 0 . 0 5 r0 . 5 0 0 . 0 5 common 31 (row 2) common 0 (row 64) segment 4 (column 128) segment 131 (column 1) common 32 (row 63) common 63 (row1) glue a free datasheet http://www..net/
9 ? 21 6. interface pin function no. symbol function 1 nc(gnd) reserved pin (supporting pin) the supporting pins can reduce the influences from stresses on the function pins. these pins must be connected to exte rnal ground. 2 vlss ground of analog circuit this is an analog ground pin. it should be connecte d to vss externally. 3 vss ground of logic circuit this is a ground pin. it also acts as a reference f or the logic pins. it must be connected to external ground. 4 nc reserved pin the n.c. pins between function pins are reserved fo r compatible and flexible design. 5 vdd power supply for logic circuit this is a voltage supply pin. it must be connected to external source. 6 bs1 7 bs2 communicating protocol select these pins are mcu interface selection input. see t he following table: 68xx-parallel 80xx-parallel serial i2c bs1 0 1 0 1 bs2 1 1 0 0 8 cs# chip select this pin is the chip select input. the chip is enab led for mcu communication only when cs# is pulled low 9 res# power reset for controller and driver this pin is reset signal input. when the pin is low , initialization of the chip is executed. 10 d/c# data/command control this pin is data/command control pin. when the pin is pulled high, the input at d7~d0 is treated as display data . when the pin is pulled low, the input at d7~d0 will be transferred to the command register. for detail relationship to mcu interface signals, please refer to the timing characteristics diagrams. when the pin is pulled high and serial interface mo de is selected, the data at sdin is treated as data. when it is pulled low, the data at sdin will be transferred to the command register. i n i2c mode, this pin acts as sa0 for slave address selection. 11 r/w# read/write select or write this pin is mcu interface input. when interfacing t o a 68xx-series microprocessor, this pin will be used as read/write (r/w#) selection input. pull this pin to high for read m ode and pull it to low for write mode. when 80xx interface mode is selected, this pin will be the write (wr#) input. data write operation is initiated when this pin is pulled low and the cs# is pulled low. free datasheet http://www..net/
10 ? 21 12 e/rd# read/write enable or read this pin is mcu interface input. when interfacing t o a 68xx-series microprocessor, this pin will be used as the enable (e) signal. read/write operation is initiate d when this pin is pulled high and the cs# is pulled low. when connecting to an 80xx-microprocessor, this pin receives the read (rd#) signal. data read operation is initiated when this pin is pulled low and cs# is pulled low. 13~20 d0~d7 host data input/output bus these pins are 8-bit bi-directional data bus to be connected to the microprocessors data bus. when serial mode is sele cted, d1 will be the serial data input sdin and d0 will be the seria l clock input sclk. when i2c mode is selected, d2 & d1 should be tired together and serve as sdaout & sdain in application and d0 is the serial clock input scl. 21 iref current reference for brightness adjustment this pin is segment current reference pin. a resist or should be connected between this pin and vss. set the current lower than 10 a. 22 vcomh voltage output high level for com signal this pin is the input pin for the voltage output hi gh level for com signals. a capacitor should be connected between th is pin and vss. 23 vcc power supply for oel panel this is the most positive voltage supply pin of the chip. it must be supplied externally. 24 gnd reserved pin (supporting pin) the supporting pins can reduce the influences from stresses on the function pins. these pins must be connected to exte rnal ground. free datasheet http://www..net/
11 ? 21 7. optics & electrical characteristics 7.1 optics characteristics characteristics symbol conditions min typ max unit brightness l br with polarizer (note 3) 100 - - cd/m 2 c.i.e. (yellow) (x) (y) without polarizer 0.43 0.46 0.47 0.50 0.51 0.54 dark room contrast cr - >2000:1 - view angle >160 - - degree * optical measurement taken at v dd = 2.8v, v cc = 12.5v. software configuration follows section 4.4 initiali zation. 7.2 dc characteristics characteristics symbol conditions min typ max unit supply voltage for logic v dd 2.4 2.8 3.5 v supply voltage for display v cc note 3 14.5 15.0 15.5 v high level input v ih i out = 100 a, 3.3mhz 0.8v dd - v dd v low level input v il i out = 100 a, 3.3mhz 0 - 0.2v dd v high level output v oh i out = 100 a, 3.3mhz 0.9v dd - v dd v low level output v ol i out = 100 a, 3.3mhz 0 - 0.1v dd v operating current for v dd i dd note 4 note 5 -- 180 180 300 300 a a operating current for v cc i cc note 4 note 5 -- 60 72 100 120 ma ma sleep mode current for v dd i dd, sleep - 1 5 a sleep mode current for v cc i cc, sleep - 1 5 a note 3: brightness (l br ) and supply voltage for display (v cc ) are subject to the change of the panel characteristics and the custome rs request. note 4: v dd = 2.8v, v cc = 12.5v, 50% display area turn on. note 5: v dd = 2.8v, v cc = 12.5v, 100% display area turn on. * software configuration follows section 4.4 initia lization. free datasheet http://www..net/
12 ? 21 7.3 ac characteristics 7.3.1 68xx-series mpu parallel interface timing cha racteristics: symbol description min max unit t cycle system cycle time 300 - ns t as address setup time 0 - ns t ah address hold time 0 - ns t dsw write data setup time 40 - ns t dhw write data hold time 7 - ns t dhr read data hold time 20 - ns t oh output disable time - 70 ns t acc access time - 140 ns pw csl chip select low pulse width (read) chip select low pulse width (write) 120 60 - ns pw csh chip select high pulse width (read) chip select high pulse width (write) 60 60 - ns t r rise time - 15 ns t f fall time - 15 ns * (v dd - v ss = 2.4v to 3.5v, t a = 25c) free datasheet http://www..net/
13 ? 21 7.3.2 80xx-series mpu parallel interface timing cha racteristics: symbol description min max unit t cycle clock cycle time 300 - ns t as address setup time 10 - ns t ah address hold time 0 - ns t dsw write data setup time 40 - ns t dhw write data hold time 7 - ns t dhr read data hold time 20 - ns t oh output disable time - 70 ns t acc access time - 140 ns t pwlr read low time 120 - ns t pwlw write low time 60 - ns t pwhr read high time 60 - ns t pwhw write high time 60 - ns t cs chip select setup time 0 - ns t csh chip select hold time to read signal 0 - ns t csf chip select hold time 20 - ns t r rise time - 15 ns t f fall time - 15 ns * (v dd - v ss = 2.4v to 3.5v, t a = 25c) free datasheet http://www..net/
14 ? 21 7.3.3 serial interface timing characteristics: symbol description min max unit t cycle clock cycle time 250 - ns t as address setup time 150 - ns t ah address hold time 150 - ns t css chip select setup time 120 - ns t csh chip select hold time 60 - ns t dsw write data setup time 50 - ns t dhw write data hold time 15 - ns t clkl serial clock low time 100 - ns t clkh serial clock high time 100 - ns t r rise time - 15 ns t f fall time - 15 ns * (v dd - v ss = 2.4v to 3.5v, t a = 25c) free datasheet http://www..net/
15 ? 21 7.3.4 i 2 c interface timing characteristics: symbol description min max unit t cycle clock cycle time 2.5 - us t hstart start condition hold time 0.6 - us t hd data hold time (for sda out pin) data hold time (for sda in pin) 0 300 - ns t sd data setup time 100 - ns start condition setup time t sstart (only relevant for a repeated start condition) 0.6 - us t sstop stop condition setup time 0.6 - us t r rise time for data and clock pin 300 ns t f fall time for data and clock pin 300 ns t idle idle time before a new transm ission can start 1.3 - us * (v dd - v ss = 2.4v to 3.5v, t a = 25c) free datasheet http://www..net/
16 ? 21 8. reliability 8.1 contents of reliability tests item conditions criteria high temperature operation 80c, 240 hrs low temperature operation -40c, 240 hrs high temperature storage 80c, 240 hrs low temperature storage -40c, 240 hrs hightemperature/humidity storage 60c, 90% rh, 240 hrs thermal shock -40c ? 80c, 24 cycles 1 hr dwell the operational functions work. * the samples used for the above tests do not inclu de polarizer. * no moisture condensation is observed during tests . 8.2 lifetime end of lifetime is specified as 50% of initial brig htness reached. parameter min max unit condition notes 10,000 - hr 100 cd/m 2 ,50%checkerboard operating life time 40,000 - hr 100 cd/m 2 , 50% checkerboard 6 note 6: the average operating lifetime at room temp erature is estimated by the accelerated operation at high temperature conditions. 8.3 failure check standard after the completion of the described reliability t est, the samples were left at room temperature for 2 hrs prior to conducting the failure test at 2 35c; 5515% rh. free datasheet http://www..net/
17 ? 21 9. inspection specification no item criterion aql 01 electrical testing 1.1 missing vertical, horizontal segment, segment c ontrast defect. 1.2 missing character , dot or icon. 1.3 display malfunction. 1.4 no function or no display. 1.5 current consumption exceeds product specificati ons. 1.6 oled viewing angle defect. 1.7 mixed product types. 1.8 contrast defect. 0.65 02 black or white spots on oled (display only) 2.1 white and black spots on display Q 0.25mm, no more than three white or black spots present. 2.2 densely spaced: no more than two spots or lines within 3mm 2.5 3.1 round type : as following drawing =( x + y ) / 2 2.5 03 oled black spots, white spots, contaminatio n (non-display) 3.2 line type : (as following drawing) length width acceptable q ty --- w Q 0.02 accept no dense l Q 3.0 0.02 w Q 0.03 l Q 2.5 0.03 w Q 0.05 2 --- 0.05 w as round type 2.5 04 polarizer bubbles if bubbles are visible, judge using black spot specifications, not easy to find, must check in specify direction. size acceptable q ty Q 0.20 accept no dense 0.20 Q 0.50 3 0.50 Q 1.00 2 1.00 0 total q ty 3 2.5 free datasheet http://www..net/
18 ? 21 no item criterion aql 05 scratches follow no.3 oled black spots, white spots, contamin ation 06 chipped glass symbols define: x: chip length y: chip width z: chip thick ness k: seal width t: glass thickness a: oled sid e length l: electrode pad length: 6.1 general glass chip : 6.1.1 chip on panel surface and crack between panel s: z: chip thickness y: chip width x: chip length z Q 1/2t not over viewing area x Q 1/8a 1/2t z Q 2t not exceed 1/3k x Q 1/8a if there are 2 or more chips, x is total length of each chip. 6.1.2 corner crack: z: chip thickness y: chip width x: chip length z Q 1/2t not over viewing area x Q 1/8a 1/2t z Q 2t not exceed 1/3k x Q 1/8a if there are 2 or more chips, x is the total length of each chip. 2.5 free datasheet http://www..net/
19 ? 21 no item criterion aql 06 glass crack symbols : x: chip length y: chip width z: chip thick ness k: seal width t: glass thickness a: oled sid e length l: electrode pad length 6.2 protrusion over terminal : 6.2.1 chip on electrode pad : y: chip width x: chip length z: chip thickness y Q 0.5mm x Q 1/8a 0 z Q t 6.2.2 non-conductive portion: y: chip width x: chip length z: chip thickness y Q l x Q 1/8a 0 z Q t if the chipped area touches the ito terminal, over 2/3 of the ito must remain and be inspected according to elect rode terminal specifications. if the product will be heat sealed by the customer, the alignment mark not be damaged. 6.2.3 substrate protuberance and internal crack. y: width x: length y Q 1/3l x Q a 2.5 free datasheet http://www..net/
20 ? 21 no item criterion aql 07 cracked glass the oled with extensive crack is not acceptable. 2. 5 08 backlight elements 8.1 illumination source flickers when lit. 8.2 spots or scratched that appear when lit must be judged. using oled spot, lines and contamination standards. 8.3 backlight doesnt light or color wrong. 0.65 2.5 0.65 09 bezel 9.1 bezel may not have rust, be deformed or have fingerprints, stains or other contamination. 9.2 bezel must comply with job specifications. 2.5 0.65 10 pcb cob 10.1 cob seal may not have pinholes larger than 0.2 mm or contamination. 10.2 cob seal surface may not have pinholes through to the ic. 10.3 the height of the cob should not exceed the he ight indicated in the assembly diagram. 10.4 there may not be more than 2mm of sealant outs ide the seal area on the pcb. and there should be no mo re than three places. 10.5 no oxidation or contamination pcb terminals. 10.6 parts on pcb must be the same as on the produc tion characteristic chart. there should be no wrong part s, missing parts or excess parts. 10.7 the jumper on the pcb should conform to the pr oduct characteristic chart. 10.8 if solder gets on bezel tab pads, led pad, zeb ra pad or screw hold pad, make sure it is smoothed down. 2.5 2.5 0.65 2.5 2.5 0.65 0.65 2.5 11 soldering 11.1 no un-melted solder paste may be present on th e pcb. 11.2 no cold solder joints, missing solder connecti ons, oxidation or icicle. 11.3 no residue or solder balls on pcb. 11.4 no short circuits in components on pcb. 2.5 2.5 2.5 0.65 free datasheet http://www..net/
21 ? 21 pattern check (display on) in active area free datasheet http://www..net/

▲Up To Search▲

Price & Availability of WEO012864BLPP3N00000

	To Download WEO012864BLPP3N00000 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .